by Marie-Eve Huot (2013)
A la mort de son père, Amélie, 11 ans, se réfugie dans le silence et se plonge dans l'univers passionnant de l'aviation. Au-dessus de son lit, elle épingle les photos de A. Earhart, de C. Lindbergh et de Léonard de Vinci. Elle imagine son père, enfant, partageant la même passion. En convoquant ce dernier pour raconter l'histoire de l'aviation, Amélie parvient à surmonter la douleur de la perte.--[Memento].
Joseph Finder
Despised after a massive layoff at his company, corporate CEO Nick Conover protects his two children from local hostilities but finds things spinning out of control when a stalker threatens his family and Nick is blamed for a murder.
Muriel Damasio
RESUMEN: Trece proyectos para construir objetos de papel maché. Thirteen projects for making objects out of papier mache.
Lynne Griffin
Door wekelijkse gesprekken tussen een moeder en haar psychologe worden beiden geconfronteerd met het verlies van hun dochter.
Yu-Chin Hsu ... [et al
The purpose of VHDL Modeling for Digital Design Synthesis is to introduce VHSIC Hardware Description Language (VHDL) and its use for synthesis. VHDL is a hardware description language which provides a means of specifying a digital system over different levels of abstraction. It supports behavior specification during the early stages of a design process and structural specification during the later implementation stages. VHDL was originally introduced as a hardware description language that permitted the simulation of digital designs. It is now increasingly used for design specifications that are given as the input to synthesis tools which translate the specifications into netlists from which the physical systems can be built. One problem with this use of VHDL is that not all of its constructs are useful in synthesis. The specification of delay in signal assignments does not have a clear meaning in synthesis, where delays have already been determined by the implementation technology. VHDL has data-structures such as files and pointers, useful for simulation purposes but not for actual synthesis. As a result, synthesis tools accept only subsets of VHDL. This book covers the synthesis aspect of VHDL, while keeping the simulation-specifics to a minimum. . VHDL Modeling for Digital Design Synthesis is designed for working professionals as well as for graduate or undergraduate students. Readers can use this book to get acquainted with VHDL and to learn how it can be used in modeling of digital designs.